Classically verifiable quantum advantage on pre-fault-tolerant hardware · revision history
Revision 1
Accepted · first revision · record
- Title
- Classically verifiable quantum advantage on pre-fault-tolerant hardware
- Plain
- Current advantage experiments produce outputs that a classical computer cannot check without redoing the hard calculation. A task that today's noisy machines can perform, that is hard classically, and whose answer is quick to check has not been demonstrated.
- Precise
- Find a task executable by circuits of depth $O(\operatorname{polylog} n)$ on $n \le 10^{3}$ qubits with two-qubit gate error $\sim 10^{-3}$ and no error correction such that (i) a classical verifier checks the output in $\operatorname{poly}(n)$ time, (ii) the task is classically hard under a standard assumption such as learning with errors, and (iii) soundness holds at the output fidelity actually achievable. Answer: a protocol with all three properties, or a no-go result relating verifiability, noise rate and depth.
- Settled by
- An experiment executing such a protocol at a size where the classical cost is established, or a theorem excluding it.
- Kind
- well-posed
- Answer type
- identification
- References
- (empty)
- Literature status
- open
- Status note
- Many 2025-2026 proposals (low-depth lattice-based, planted-structure and obfuscation-based schemes, e.g. arXiv:2609.01448, arXiv:2609.39918) address subsets of these conditions.
- Posed since
- (empty)